Rony Antony, Complete data and address generation for memory testing using modified LFSR structures, in 2nd IEEE International Conference on Recent Trends in Electronics Information & Communication Technology (RTEICT) (2017), pp. Yang, A parallel and reconfigurable united architecture for Fibonacci and Galois LFSR, in 7th International Conference on Intelligent Human-Machine System and Cybernetics (2015), pp. Alfke, Efficient shift registers, LFSR counters and long pseudorandom sequence generators, Xilinx Inc., San Jose, CA, USA, Tech, Rep, XAPP 052, 1996 Tyszer, Ring generator: an ultimate linear feedback shift register. Harjani, A 3x5-Gb/s multilane low-power 0.18-um CMOS pseudorandom bit sequence generator. Athieswari, Design of multistage linear feedback shift register based counters using CMOS logic style. Redoute, Multistage linear feedback shift register counters with reduced decoding logic in 130-nm CMOS for large-scale array applications. Weng, Maximal and near maximal shift register sequences: Efficient event counters and easy discrete logarithms. Szczepanski, A CMOS pixel with embedded ADC, digital CDS and gain correction capability for massively parallel imaging array. Subramnayam, Comparison of binary and LFSR counters and efficient LFSR decoding algorithm, in Proceedings of IEEE 54th INt. Due to its efficacy, they can be used in deep learning and big data analysis. A two stage LFSR counter is implemented in Xilinx Vivado 2017.2, and the results are validated. Also instead of using a decoding logic for each stage as in existing literature, a single decoder with a multiplexer is used. In this paper, the LFSR counters are combined with binary counters and the performance in terms of area, speed and power are compared with existing multistage counters. However, if LFSR counter is used for first stage and binary counters for subsequent stages could increase performance of the counter designs. In existing literature, only many-to-one LFSR structure was used. Compared to a conventional binary counter, these counters enhance area and performance. Linear feedback shift registers (LFSR) can be considered as the best option for such applications, where the area can be considerably reduced. Applications such as single-photon detection require the use of large array of counters within a small area.
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